The Embodied AI Chip Debate: Brain Versus Cerebellum and the Push for In-House Silicon

As capital floods into embodied AI, the semiconductor industry is wrestling with core architectural debates. The division between high compute brains and low latency cerebellums, alongside a growing trend of robotics companies developing in house chips, is reshaping the hardware landscape.

Arthur

4 min readPosted: Jul 1, 2026

The Embodied AI Chip Debate: Brain Versus Cerebellum and the Push for In-House Silicon

The rapid advancement of embodied artificial intelligence (AI) is forcing a fundamental reassessment of the chips that power robots. As nearly 43.8 billion yuan flowed into China's embodied AI sector in the first half of 2026, and as major suppliers rolled out new hardware and reference designs, a deceptively simple question has moved to the center of the industry. When everyone talks about building chips, do they truly understand what kind of chip an embodied AI system actually needs? The answer is far from settled, and the disagreement is reshaping how capital and engineering effort are being allocated across the supply chain.

Beyond Compute: The Real Time Imperative

The dominant narrative in the embodied AI chip space is a race for raw computing power, usually expressed in tera operations per second (TOPS) or floating point operations. New parts are routinely introduced with headline performance figures, and those numbers shape how the public understands chip capability. Yet the industry is increasingly aware that this framework is incomplete.

Embodied AI and cloud AI have fundamentally different requirements. Cloud based inference for large models chases throughput, processing as much data as possible per unit of time. A robot executing a precise physical operation instead requires latency determinism, meaning the response time for every command must be stable and predictable. Consider tactile feedback. When a robot's finger touches an object, the force signal from its sensors must be processed and returned to the joint motors within milliseconds, or the robot risks dropping or crushing the item. The stringent demands of this closed control loop are not captured by a TOPS figure at all, which is why an exclusive focus on peak compute can be misleading.

The Brain and the Cerebellum

The proposal of a brain and cerebellum division of labor is a direct response to this reality. Under this framework, the brain handles high level perception, planning, and multimodal understanding, tasks that involve heavy computation but relatively relaxed real time requirements. The cerebellum manages motion control and real time feedback, tasks with lighter computation but extreme demands on latency and power efficiency. Because their needs are so different, the two functions increasingly call for different chips.

On the brain side, one major supplier has established a full stack ecosystem spanning hardware, development frameworks, and simulation platforms, and in June 2026 it went a step further by bundling chips, an operating system, and safety certification into a single robotics safety system with dozens of participating companies. For robot manufacturers, adopting such a solution shortens development cycles and lowers technical risk. That dominance is not unassailable, however. As one chip analyst observed, the software ecosystem that forms the supplier's moat is not as deeply entrenched in robotics as it is in AI model training, and the cost for robot developers to switch toolchains is far lower than for cloud providers switching training frameworks. Competitors expanding from smart cockpits and autonomous driving are entering the brain race, benefiting from the high similarity between the perception layers of cars and robots.

Domestic Progress on the Cerebellum

Progress on the cerebellum side is more pronounced among domestic Chinese manufacturers. Because cerebellum chips are closer to traditional microcontrollers and specialized signal processors, they depend less on the most advanced manufacturing processes, which allows domestic firms to leverage their accumulated expertise in mature nodes. The competitive logic of this segment is entirely different from the brain race. It does not chase peak compute but rather stability and energy efficiency when paired with specific actuators.

The technical stakes are concrete. One semiconductor developer released a cerebellum chip based on an analog domain architecture that shifts the most time sensitive control calculations from digital processing to real time parallel analog computation, reducing hardware processing latency for key control commands from 2.8 nanoseconds to 0.2 nanoseconds. As one industry insider noted, cerebellum chips are characterized by high volume, broad application, and high customer stickiness. Every joint needs a control chip, a humanoid robot might need dozens, and once a chip is adapted into a design the cost of replacing it is extremely high. That makes the segment fertile territory for specialized semiconductor firms.

In House Versus General Purpose Silicon

A parallel debate concerns who should design the chips at all. Two developments in June pushed in house silicon into the spotlight. UBTech formed a joint venture aimed at developing custom chips, with a tape out planned for the second half of 2027 and mass production targeted for 2028, and an automaker released a self developed chip while explicitly positioning its vehicles as embodied AI terminals. The drivers for in house development are clear. The chairman of UBTech has stated publicly that foreign general purpose chips keep costs high and fail to match performance to the specific needs of robots, noting that foreign chips and materials can account for roughly one third of a robot's bill of materials. As production scales, the share of cost tied to chips becomes more prominent, making in house development a path to controlling expenses. Supply chain security, amid escalating semiconductor export controls, is a further motivation.

The challenges are equally formidable. Scaling a data center style architecture down to the edge has little precedent, the two year timeline from founding a venture to tape out is aggressive by chip industry standards, and whether costs can be amortized through sufficient sales volume remains an open economic question. In house development is therefore not the only route. Joint ventures share both risk and the right to define chips for specific scenarios, while third party vendors advocate a platform approach that provides standardized computing foundations on which manufacturers build their own differentiation.

One Judgment Beneath Three Threads

Beneath these debates lies a single underlying judgment about how quickly robot algorithms will converge. If frameworks such as Vision Language Action models and world models unify within the next three to five years, the return on dedicated chips rises significantly, because a stable target justifies the cost of customization. If algorithms continue to iterate rapidly, the flexibility of general purpose platforms combined with heterogeneous computing becomes more attractive. Both paths have coherent industrial logic, and no definitive verdict is yet possible.

For now, the embodied AI chip market is defined by productive uncertainty. The separation of brain and cerebellum, the domestic momentum in control silicon, and the competing routes of in house design, joint ventures, and platform provision together describe an industry still deciding where its most durable value will sit. How that question resolves will shape the cost, capability, and independence of the robots that reach factory floors over the remainder of the decade.